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- When an inhomogeneous plane wave is introduced into a dense dielectric layer, it can bounce between the two boundaries. 把一非均勻平面波引進(jìn)折射率較高的介質(zhì)層時(shí),它會(huì )在上下界面間來(lái)回地“彈”射。
- Tunneling allows voltage to flow from the control gate to the floating gate through the dielectric layer of oxide which separates them. 允許從隧道流電壓控制的浮動(dòng)柵柵絕緣層氧化物通過(guò)分隔他們。
- Dual damascene technology of Cu / low dielectric layer is introduced in this paper, andthis technology has been used in manufacturing DRAM and logic devices. 介紹了銅/低介電常數介電層的雙嵌入式工藝,該工藝已大規模應用于動(dòng)態(tài)記憶存儲器(DRAM)和邏輯電路器件中。
- Especially, the quality of gate dielectric layer determines the reliability and electrical performance of ultra large scale integrated (ULSI) circuit. 特別是閘極介電層的品質(zhì)能決定ULSI電路的穩定度與電特性表現。
- We focus on how the processes in repaid thermal processor (RTP) affect the electrical characteristics quality of gate dielectric layer. 我們將會(huì )集中以快速熱制程如何影響介電層電特性。
- And the conclusion is presented too.It is easy to design and manufacture waveguide filter using dielectric layer PBG structures. 利用介質(zhì)層PBG結構來(lái)制作波導濾波器具有設計簡(jiǎn)單、易于實(shí)現的顯著(zhù)優(yōu)點(diǎn)。
- We show the reflection and transmission behaviors when SPPs propagate along the metallic surface with one dimensional dielectric layer coated. 我們進(jìn)一步討論了表面等離子體激元在一維結構正入射時(shí)的反射性質(zhì),以及完全帶隙的構造,和初步的實(shí)驗結果。
- NTBI induced device degradation can be suppressed by a SiN capping layer between Poly-Si gate and high k dielectric layer. 在閘極與高介電常數介電層間使用氮化矽可有效抑制負偏壓溫度不穩定性的現象。
- While the top electrode is located on the third dielectric layer, in which each third dielectric layer and its top electrode compose a stack structure. 而上電極是位于第三介電層上,其中由每一第三介電層與其上的上電極組成一個(gè)堆棧結構。
- Dual damascene technology of Cu/ low dielectric layer is introduced in this paper, andthis technology has been used in manufacturing DRAM and logic devices. 介紹了銅/介電常數介電層的雙嵌入式工藝,該工藝已大規模應用于動(dòng)態(tài)記憶存儲器(RAM)邏輯電路器件中。
- As a vertically extended contact surface is formed between the said metallic pad and the dielectric layer in the dentritic structure, the contact surface and adhesion are increased. 由于在金屬接線(xiàn)墊層及位于樹(shù)枝狀子結構中的介電層之間形成垂直延伸接觸表面,因此擴大了接觸面積而增強附著(zhù)力;樹(shù)枝狀子結構在介電層的邊緣部分不連續可有效截斷而防止形成裂縫。
- The reflection is lower for polarization by using this method.On the basis of the reflectance R from a dielectric layer on an isotropy medium, the condition to produce polarization is discussed. 從介質(zhì)膜的能量反射比R出發(fā),探討了在各向同性介質(zhì)表面鍍介質(zhì)膜時(shí),反射光為偏振光的條件。
- We can classify thin films into four groups:thermal oxides,dielectric layers,polycrystalline silicon, and metal films. 我們可以把薄膜分成四組:熱氧化物,介電質(zhì)層,多晶硅,金屬薄膜。
- insnlator / enhanced dielectric layer field 絕緣/介質(zhì)場(chǎng)增強
- A buffer in a drum used to temporarily store data. 磁鼓中用來(lái)暫時(shí)存放數據的一種緩沖區。
- The frequency response of FSS highly depends on the configurations and spacing of the elements as well as on the thickness and permittivity of dielectric layers that may be part of the screens. 能夠影響頻率選擇表面之頻率響應的因素有許多,諸如金屬排列的幾何形狀、周期長(cháng)度及其間隙大??;而作為其基底之介電材料的電磁特性及厚度也是需要考量的因素。
- Surface Wave on a Plane Conductor Coated with Thin Dielectric Layer 覆蓋薄層介質(zhì)平面導體上的表面波
- This layer of rock contains a lot of flint. 這一巖層中有大量燧石。
- Optimized Design of Dielectric Layer PBG Structure in Waveguide Filter 波導介質(zhì)層PBG結構濾波器的優(yōu)化設計
- A protective pier or dock apron used as a buffer against floating ice. 橋墩護檻保護橋槨免受浮冰碰撞的護欄或碼頭圍欄