您要查找的是不是：
- A transistor memory cell can be made with any number of terminals. 晶體管存貯單元端點(diǎn)的數量是不受限制的。
- Characterize standard logic cells and memory cells. 提取標準邏輯單元和存儲電路的參數。
- The memory cells may be multistate memory cells. 該存儲單元可以是多狀態(tài)存儲單元。
- This problem can occur if 70 (binary 1000110) has been changed to 6 (binary 000110) by an unstable memory cell. 如果不穩定的內存單元已將70(二進(jìn)制為1000110)更改為6(二進(jìn)制為000110),則會(huì )發(fā)生此問(wèn)題。
- The generation mechanism of stress induced leakage current( SILC) in flash memory cell is studied by experiments. 通過(guò)實(shí)驗研究了閃速存儲器存儲單元中應力誘生漏電流(ILC)產(chǎn)生機理.
- The use of the program in 8237 will realize the magic memory modules of the data copied to several other memory cell. 在該程序中利用8237實(shí)現了將內存中魔幾個(gè)單元的數據復制到另外幾個(gè)存儲單元。
- US Patern No. 5834806, 1998, “Raised-Bitline, Contactless, Trenched, Flash Memory Cell”, by R.L. Lin, C.H.-H Hsu, M.S. Liang. “極快速擬動(dòng)態(tài)非揮發(fā)性快閃記憶體之陣列結構與其執行編碼時(shí)臨界電壓自我校正方法”;林瑞霖;徐清祥.
- Associate roll out during jotter National Day " double nucleus + double memory " combination, will older rate releases double nucleus, especially cruel farsighted the powerful function of 2 processor. 聯(lián)想筆記本國慶期間推出“雙核+雙內存”組合,將更大程度釋放雙核,特別是酷睿2處理器的強大性能。
- The mirror image position plan through saves each bit memory in an insulation grid both sides method in each memory cell two bits. 鏡像位方案通過(guò)把每個(gè)比特存儲在一個(gè)絕緣柵兩端的方法在每個(gè)存儲單元中存儲兩個(gè)比特。
- One of the main difficulties of quantum computation is that decoherence destroys the information in a quantum computer memory cell. 量子計算機存儲單元的相干脫散，破壞量子態(tài)中的信息，是量子計算機難以實(shí)現的主要原因之一。
- Reading the charges stored on the floating gate of a memory cell is one of the most critical operations in an EEPROM device. 設計者常常要在靈敏放大器的面積、功耗以及讀數據的速度之間折衷考慮。
- Meanwhile the relation of SNM and the gate width is also analyzed, which is consistent with the experiment. The design rules of VDSM SRAM memory cell are given. 文中同時(shí)分析了柵寬與 SNM的關(guān)系 ,其結論與實(shí)驗結果一致 ,并給出了 VDSM SRAM存儲單元設計中應注意的問(wèn)題
- Based on the unified ferroelectric device model which is applied practically to the design, the 2T 2C configuration of the ferroelectric DRO memory cell is discussed in detail. 基于被應用于實(shí)際設計之中的統一的鐵電器件模型，詳細討論了2T?2C組態(tài)的鐵電破壞性讀出存儲器單元的設計。
- Physical addresses are used to address memory cells in memory chips. 物理地址是用來(lái)真正訪(fǎng)問(wèn)內存單元的地址。
- Also there is a tool called RC Physical, it can take the netlist and DEF which is from the floorplan and memory cell placement, and it can optimize the timing for the netlist. 現在要用這個(gè)工具,我孤陋寡聞,從沒(méi)聽(tīng)說(shuō)過(guò)這個(gè)工具,哪位知道的,能不能介紹一下,萬(wàn)分感謝!
- Unused memory cells following the BELL&RET command are considered free. 在電鈴&浸水使柔軟指令之后的不用記憶單元是考慮過(guò)的免費。
- Flip-flops are a key componemt and memory cells of sequential logic circuit. 觸發(fā)器是構成時(shí)序邏輯電路的存儲單元和核心部件。
- He is working double tides to finish his essay. 他日夜苦干，趕寫(xiě)他的文章。
- A memory cell array includes a plurality of memory cells each of which has a control gate and a floating gate. 存儲單元陣列包括多個(gè)存儲單元，每一存儲單元具有控制柵和浮動(dòng)柵。
- I do not realize it is a double feature. 我原先不知道這是雙片連映。
