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- 全數字鎖相環(huán)路DPLLdigital phase locked loop
- 全數字鎖相環(huán)路all-digitized phase lock loop
- 一種大頻偏和低信噪比條件下的全數字鎖相環(huán)設計The Design of DPLL for Low SNR Signals with Large Frequency Offset
- 傳統的數字鎖相環(huán) (DPLL)多采用吞脈沖的方法來(lái)實(shí)現DCO ,此方法要求工作頻率遠高于DPLL的輸出頻率。The normal idea to make up a digital controled oscillator (DCO)of the digital phase locked loop (DPLL)is to delete the pulses unwanted It need that the master clock frequency must be more faster than the output frepuency of the DPLL.
- 延遲鎖相環(huán)路delay PLL
- 全數字網(wǎng)all-digital network
- 頻率捷變脈沖雷達用快速捕獲鎖相環(huán)路Fast Acquisition Phas-Locked Loops for Frequency Agile Pulsed Radar Systems
- 全數字調速all digital speed-regulation
- 數字鎖頻環(huán)digital frequency lock loop(DFLL)
- 全數字仿算all-digital simulation
- 脈沖無(wú)線(xiàn)電通信系統的正交鎖相環(huán)路同步方法Timing Acquisition of Impulse Radio System with Orthogonal Analog Phase Lock Loop
- 全數字超聲digital imaging system
- 全數字調制器all - digital modulator
- 一個(gè)概周期鎖相環(huán)路方程的概周期解的一個(gè)概周期鎖相環(huán)路方程的概周期解的Existence, Uniqueness and Asymptotic Stability of Existence, Uniqueness and Asymptotic Stability of in Phase Locked Technology
- 全數字解調器all-digital demodulator
- 全數字測深儀all-digital depth sounder
- 本文首先介紹了該頻率源的設計背景及電路方案,然后介紹了鎖相環(huán)路、電調諧介質(zhì)諧振器穩頻振蕩器(Vt-DRO)的設計過(guò)程。First, this paper introduces the background and block diagram of this frequency source, and then introduces the scheme of the sub-harmonic sampling phase-lock loop and push-push DRO.
- 全數字全息術(shù)all-digital holography
- 全數字應答機full digital answering machine
