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- A new method of designing synchronous sequential logic circuits is propsed. 提出了一種設計同步時(shí)序邏輯電路的新方法。
- Flip-flops are a key componemt and memory cells of sequential logic circuit. 觸發(fā)器是構成時(shí)序邏輯電路的存儲單元和核心部件。
- Sequential logic synthesis is an important part of RTL synthesis system design. 時(shí)序邏輯綜合是RTL綜合系統設計中的一個(gè)重要部分。
- The second is where you have to integrate the loop closely with the sequential logic. 第二點(diǎn)是，人們必須將一些控制環(huán)與順序邏輯控制更緊密地集成。
- Because of the decentralization,a large-scale logic array and ASIC digital circuit can realize the CMAC controller easily. 由于采用分散CMAC結構，簡(jiǎn)化了控制器實(shí)現的復雜度，易于采用大規?？删幊虜底诌壿嬯嚵泻虯SIC數字電路予以硬件實(shí)現。
- Complex programmable logic device (CPLD), usually used to develop ASIC, is widely used in digital system to accomplish complex combinational and sequential logic. 復雜的可編程邏輯器件(CPLD)廣泛地用于數字系統中，常用作設計自己的專(zhuān)用集成電路，可實(shí)現復雜的組合邏輯和時(shí)序邏輯。
- Field programmable logic array, FPGA, can reduce the NRE cost, design risk Time-to-Market and maintenance cost of electronic system.So FPGA is widely used in electronic systems. 現場(chǎng)可編程門(mén)陣列（FPGA）能夠減少電子系統的開(kāi)發(fā)風(fēng)險和開(kāi)發(fā)成本，縮短上市時(shí)間，降低維護升級成本，故廣泛地應用在電子系統中。
- By dividing RTL description into combinational logic and sequential logic, the method reuses the combinational logic synthesis and sequential logic synthesis in the controller synthesis, thus reducing the time used in developing RTL synthesis. 提出一種通過(guò)將RTL描述劃分為時(shí)序邏輯與組合邏輯后 ;重用控制器綜合中的組合邏輯綜合和時(shí)序邏輯綜合實(shí)現 RTL綜合的方法 .;此方法有效地利用了已有的成熟技術(shù);為縮短 RTL綜合的開(kāi)發(fā)時(shí)間提供了一種有效途徑
- Network configuration of separated Crossbar employs the SEED devices as high speed optical modulators and the FET SEED device integrated on a single GaAs chip as optical logic array. 該體系結構中可采用自電光效應（SEED）器件作為高速光調制器，采用在單塊GaAs基片上集成的場(chǎng)效應晶體管－自電光效應器件（FET－SEED）作為邏輯光開(kāi)關(guān)器件。
- FPGA, Field programmable logic array, can reduce the NRE cost, design risk, Time-to-Market and maintenance cost of electronic system.Therefore, FPGA is widely used in electronic systems. 現場(chǎng)可編程門(mén)陣列（FPGA）能夠減少電子系統的開(kāi)發(fā)風(fēng)險和開(kāi)發(fā)成本，縮短 上市時(shí)間，降低維護升級成本，故廣泛地應用在電子系統中。
- The Deka value T gate is a kind of multi functional and general logical unit. It has independent perfection function,and it can realize any combination logic and sequential logic. 十值T門(mén)是一種多功能通用邏輯部件;具有獨立的功能完備性;它可以實(shí)現任何組合邏輯和時(shí)序邏輯.
- Computer aided logical design(CALD) software design rapidly and exactly combinational logical and sequential logical circuits. 該軟件可以快速、準確、可靠地設計出多輸入多輸出液控邏輯回路，設計結果可以達到最優(yōu)。
- FPLA Field Programmable Logic Array 現場(chǎng)可編程邏輯陣列
- The Race and Hazard in the Sequential Logic Circuit 時(shí)序邏輯電路中的競爭冒險
- autonomous testable programmable logic array 獨立可測的可編程序邏輯陣列
- A Rapid Design Approach of Sequential Logic Net 一種時(shí)序邏輯網(wǎng)絡(luò )的快速設計方法
- Designing synchronours sequential logic circuits 同步時(shí)序邏輯電路設計新法
- bipolar programmable logic array 雙極型可編程邏輯陣列
- rewritable programmable logic array 可重寫(xiě)可編程邏輯陣列
- synchronous sequential logic circuits 同步時(shí)序邏輯電路
