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- One example is the phase comparator of a phase locked loop. 一個(gè)例子是相鎖環(huán)狀態(tài)下的相位比較器。
- Phase locked loop (PLL) has been widely used in communication system. 鎖相環(huán)路在通信系統中得到了廣泛的應用。
- Resolution of Systematic Design Trouble with PLD Interior Phase Lock Loop. 使用PLD內部鎖相環(huán)解決系統設計難題。
- The phase jitter of output signal of the PLL( phase locked loop) frequency doubler is analyzed. 定量分析了數字式鎖相倍頻器輸出信號的相位抖動(dòng).
- A phase locked wavelength drive prevents peak shifts and peak suppression at high scan speeds. 相位鎖定波長(cháng)驅動(dòng)技術(shù)可以防止儀器在快速掃描時(shí)吸收峰的偏移。
- Phase locked loops (PLL) are electronic systems widely used in different fields of applications. 鎖相回路（PLL）做為一種電子系統廣泛的用于不同的應用領(lǐng)域。
- TMS320F240 DSP is used to realize the digital Phase Locked Loop(PLL) and real-ize the hot-swap function of the parallel system. 采用TMS320F240型DSP芯片實(shí)現數字鎖相同步,實(shí)現并聯(lián)系統的熱插拔功能。
- This paper discusses a method to demodulate FSK signal, on the basis of FPGA chip, by applying all- digital phase locked loop. 本文研究了一種采用全數字鎖相環(huán)實(shí)現頻移鍵控FSK信號解調的新方案。
- The basic principle of using phase locked loop technique to realize the design and analysis of program controlled frequency syntheses was introduced. 本文簡(jiǎn)要地敘述了應用鎖相環(huán)路實(shí)現信號合成的基本原理。
- Both incorporation exterior VCO and loop filter could rattling realize celerity Phase Lock function. 結合外部VCO和環(huán)路濾波器可以很好的實(shí)現快速鎖相功能。
- Abstract：The Phase Lock Loop (PLL) Circuits are widely used in electronic systems especially in receivers. 鎖相環(huán)路是在現代各種電子系統中，特別是在接收機中應用廣泛的一種基本電路。
- The coupling visibilities(CV) of temperature sensor heads were measured with phase lock loop technique. 采用鎖相環(huán)技術(shù)測試了各傳感器的分光可見(jiàn)度隨溫度的變化關(guān)系。
- Results show that the phase locking steps occur in the IV-curves. 結果表明，在直流伏安特性曲線(xiàn)上出現了相鎖定臺階。
- In this paper the working princi-ple and desiging method of which phase locked loop are discussed the experimental resuIts are given also. 本文分析了無(wú)相差鎖相環(huán)的原理和設計方法，并給出了實(shí)驗結果。
- This paper presents a digital phase lock technique for UPS inverter output control to meet the trend of UPS digital control. 針對不間斷電源(UninterruptedPowerSupply,UPS)控制的數字化趨勢,提出了一種應用于數字化UPS的逆變鎖相控制技術(shù)。
- The transmitter uses a phase locked loop to provide multi-phase clocks for PRBS circuit and 4-to-1 multiplexer to convert parallel data into serial one. 在傳輸端利用鎖相迴路提供多相位時(shí)脈輸出給亂數產(chǎn)生器和4對1多工器，并將一組并列資料轉換為串列輸出，再經(jīng)傳輸器使輸出的資料振幅放大，最后將資料傳輸至耦合的電極板上。
- Chorng-Sii Hwang and Wen-Wei Chiu, “Internal offset-canceled phase locked loop-based deskew buffer”, US Patent No.6346838, from Feb. 12th, 2002 to Jan. 5th 2021. 黃崇禧,邱文偉“以鎖相迴路為基礎之去偏差緩沖電路及其產(chǎn)生方法”,臺灣專(zhuān)利，專(zhuān)利字號541800,自2003年7月11日起至2021年11月28日止。
- It is a fundamental for all synchronism to achieve phase locked.It is discussed in this paper for one type of phase locked circuit in laser typesetter with scan deflector. 而激光照排機中的鎖相電路又是激光照排機電路部分的關(guān)鍵,成功鎖相是實(shí)現照排機各項同步的基礎。
