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- Trigger control circuit from complex programmable logic device (CPLD), ICL7135CN, the clock pulse circuit and optocoupler inverter constituted. 觸發(fā)控制電路由復雜可編程邏輯器件(CPLD),ICL7135CN,時(shí)鐘脈沖電路、反相器和光耦構成。
- If the host pulls clock low before the first high-to-low clock transition, or after the falling edge of the last clock pulse, the keyboard/mouse does not need to retransmit any data. 如果在第一個(gè)高->低時(shí)鐘跳變時(shí),(或者在最后一個(gè)時(shí)鐘脈沖的下降沿之后)主機將時(shí)鐘拉低,鍵盤(pán)/鼠標不必重新傳輸任何數據。
- If the host pulls clock low before the first high-to-low clock transition, or after the falling edge of the last clock pulse, the keyboard/ mouse does not need to retransmit any data. 如果在第一個(gè)高->時(shí)鐘跳變時(shí),(者在最后一個(gè)時(shí)鐘脈沖的下降沿之后)機將時(shí)鐘拉低,鍵盤(pán)/標不必重新傳輸任何數據。
- If the host pulls clock low before the first high-to-low clock transition, or after the falling edge of the a last clock pulse, the keyboard/mouse does not need to retransmit any data. 如果在第一個(gè)高->低時(shí)鐘跳變時(shí),(或者在最后一個(gè)時(shí)鐘脈沖的下降沿之后)主機將時(shí)鐘拉低,鍵盤(pán)/鼠標不必重新傳輸任何數據。
- The parallel loading of the flip-flop can be synchronous (i.e., occurs with the clock pulse) or asynchronous (independent of the clock pulse) depending on the design of the shift register. 觸發(fā)器的并行加載可以是同步的(即在時(shí)鐘脈沖到達時(shí)發(fā)生)或異步的(不依賴(lài)于時(shí)鐘),這取決于移位寄存器的設計。
- Note that a set of lights attached to O1, O2, O3 would display the numbers of full clock pulses which had been completed, in binary (modulo 8), from the first pulse. 注意,一組接在O1,O2,O3上的燈泡將以二進(jìn)制(模8)形式顯示第一個(gè)脈沖以來(lái)已完成的完整時(shí)鐘脈沖數。
- A microprocessor designer may decide to make all instructions last five clock pulses. 微處理機設計人員可以決定使所有的指令持續五個(gè)時(shí)鐘脈沖。
- Programmable output clock pulse width 輸出脈沖寬度可編程
- suppressed clock pulse duration modulation 壓縮時(shí)鐘脈沖寬度調制
- multiphase clock pulse generator 多相時(shí)鐘脈沖發(fā)生器
- In binary synchronous communication, the use of clock pulses to control synchron ization of data and control characters. 在二進(jìn)制位同步通信中,使用時(shí)鐘脈沖來(lái)控制數據和控制字符的同步。
- To get the current temperature, you must write 35 fixed bytes into the port register.The sensor expects 16 clock pulses on the SCK line while the SS# is low. 為了取得當前溫度;你必須寫(xiě)35個(gè)固定的字節到端口寄存器.;當ss低的時(shí)候,該傳感器預計16個(gè)時(shí)鐘脈沖在串行時(shí)鐘線(xiàn)。
- The answer to my request was in the negative. 對我的請求的答復是否定的。
- An unwanted false electronic pulse. 一種不希望有的假電子脈沖。
- I didn't wake up until I heard the alarm clock. 直到聽(tīng)到鬧鐘的鈴聲我才醒來(lái)。
- That clock is a family heirloom. 那個(gè)座鐘是祖傳下來(lái)的。
- His answer to my request was a negative. 我的請求遭到了他的拒絕。
- The tests for hepatitis were negative. 肝炎檢查結果是陰性。
- I set it by the clock on the railway station. 我是按火車(chē)站的大鐘對的。
- Their criticism was not negative. 他們的批評并不是負面的。