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- N is the desired noninteger frequency divider. N為所要求的非整數分頻值。
- It was used as a frequency divider and no numbers are decoded from it. 它被用作無(wú)解碼輸出的分頻器。
- Verilog HDL design of frequency divider in RTC module is studied here. 文中研究在RTC模塊中分頻器設計的Verilog HDL實(shí)現。
- This paper gives out a design of the equal duty ratio arbitrary integer frequency divider based on FPGA. 給出了一種基于FPGA的等占空比任意整數分頻電路的設計方法。
- Additionally, a highly precise coder on the shaft is researched.A simple and effective frequency divider is designed for correlative calculation. 此外，文中還對高精度碼盤(pán)在伺服系統中的應用展開(kāi)了深入的研究，并設計了一套簡(jiǎn)單實(shí)用的分頻器以便進(jìn)行相關(guān)的運算。
- The key building blocks in the frequency synthesizer are the voltage controlled oscillator (VCO) and the high frequency divider circuit. 摘要:壓控振蕩器與除頻器是頻率合成器電路中，主要的電路之一。
- A novel edge-triggered D-flip-flop based on a resonant tunneling diode (RTD) is proposed and used to construct a binary frequency divider. 摘要提出了一種基于共振隧穿二極管的新型邊沿觸發(fā)D觸發(fā)器并將之用于構成二進(jìn)制分頻器。
- Other than VCO, the frequency divider is the design bottleneck for high-frequency PLL since the conventional flip-flop based structure is not suitable for high-speed operation. 除壓控振蕩器外，除頻器是另一實(shí)現高頻鎖相迴路之設計瓶頸。
- Direct Analog Frequency Synthesis(DAFS) 直接模擬頻率合成
- analog frequency modulation system 模擬調頻制
- Voltage controlled oscillator (VCO) and frequency divider (FD) are the main components of phase locked loop (PLL). For VCO, low phase noise can avoid the affection of Adjacent-Channel Interference. 摘要:壓控振蕩器與除頻器是鎖相迴路中，主要的電路之一。對壓控振蕩器而言，低相位雜訊可避免造成相鄰通道的干擾。
- This paper introduces the principle of the frequency division and presents the circuit design of the decimal frequency divider based on FPGA. The VHDL language is used for the programming. 摘要介紹了一種基于FPGA的小數分頻器的分頻原理及電路設計，并用VHDL進(jìn)行編程實(shí)現，并對這種小數分頻器的抖動(dòng)進(jìn)行分析和計算。
- Analogous Frequency Domain Dielectric Spectroscopy of BST 鈦酸鍶鋇的類(lèi)頻域介電譜
- The heart is analogous to a pump. 心臟和水泵有相似之處。
- In this paper, a solution to fractional frequency dividing frequency synthesizer is introduced. 文中介紹了一種小數分頻頻率合成器的設計方案。
- The Design of Very High Speed Frequency Divider 超高速分頻器設計
- The Design of a Decimal Frequency Divider 一種小數分頻器的設計及性能分析
- Implementation of a New Type of Frequency Divider 一種新型分頻器的設計實(shí)現
- Describes a new design of pulse frequency dividers in which timers NE556 and sequencecontrol unijunction transistors are used. 利用定時(shí)器NE556和程控單結晶體管，設計了一種新型多路脈沖分配器。
