With the proposed digital calibration circuit, the mismatch-induced timing error among multiphase clocks can be reduced to be less than 1.2X quantization error theoretically.是什么意思_With the proposed digital calibration circuit, the mismatch-induced timing error among multiphase clocks can be reduced to be less than 1.2X quantization error theoretically.在線(xiàn)翻譯_英語(yǔ)_讀音_用法_例句