This thesis presents one voltage controlled oscillator and two injection locked frequency dividers, which are implemented by using standard TSMC 0.18um and 0.35um CMOS process respectively.是什么意思_This thesis presents one voltage controlled oscillator and two injection locked frequency dividers, which are implemented by using standard TSMC 0.18um and 0.35um CMOS process respectively.在線(xiàn)翻譯_英語(yǔ)_讀音_用法_例句