This paper states design of layout and examination of DRC (Design Rule Checking) and LVS (Layout Versus Schematic) and extract of RC parasitic parameter of a kind of memory of 16 digit.

 
  • 闡述了對一種16位存儲器版圖設計中的DRC(DesignRuleChecking)即"設計規則檢查"和LVS(LayoutVersusSchematic)即"版圖和電路比較"、以及RC寄生參數的提取.
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目錄 附錄 查詞歷史
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