This paper presents the YH TS-1 instruction architecture, which based on the vector expansion of ARM V4 instruction architecture. It supports vector processing and scalar processing in the same instruction set.是什么意思_This paper presents the YH TS-1 instruction architecture, which based on the vector expansion of ARM V4 instruction architecture. It supports vector processing and scalar processing in the same instruction set.在線(xiàn)翻譯_英語(yǔ)_讀音_用法_例句