This paper presents a linear CCD driver design with a Complicated Programmable Logical Devices (CPLD) which makes integration time and frequency tuned simultaneously.

 
  • 介紹了一種利用可編程邏輯器件(CPLD)實(shí)現積分時(shí)間和頻率同時(shí)可調的線(xiàn)陣CCD驅動(dòng)方法。
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