The proposed circuit improves the duty-cycle variation tolerance, rejects the jitter of input data and has a better performance in the G bit EPON system.

 
  • 它提升了佔空比區分容限,抑制了時(shí)鐘恢復級的數據的抖動(dòng),構造出更加適合吉比特級的時(shí)鐘數據恢復電路。
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