The normal idea to make up a digital controled oscillator (DCO)of the digital phase locked loop (DPLL)is to delete the pulses unwanted It need that the master clock frequency must be more faster than the output frepuency of the DPLL.

 
  • 傳統的數字鎖相環(huán) (DPLL)多采用吞脈沖的方法來(lái)實(shí)現DCO ,此方法要求工作頻率遠高于DPLL的輸出頻率。
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