The improved model of input buffer presented is to insert a quasi random memory between input queue and arbitration logic at ATM switching unit.

 
  • 改進(jìn)的輸入緩沖方案是在A(yíng)TM交換單元的輸入隊列和仲裁邏輯之間加入一個(gè)準隨機存儲器。
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