The common approach to implement DDC (Digital Down Conversion) on FPGA is based on a look-up table, which requires a huge volume of ROM to achieve high resolution.

 
  • 摘要數字下變頻的FPGA實(shí)現通常都是基于查表的方法,為了達到高精度要求,常常需要耗費大量的ROM資源去建立龐大的查找表。
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