Design criteria for such signal source are derived, upon which one can choose the PLL loop bandwidth by trade-off considerations, to get a relatively low BER, simultaneously obtain low spurious output and fast frequency hopping as well.
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- 為了減小相噪對系統性能的影響,導出了此類(lèi)信號源的設計判據,據此可基于折衷考慮選取環(huán)路帶寬,以便同時(shí)獲得較低的誤碼率,以及低的寄生輸出和較快的頻率跳變速度。