Constant coefficient multiplier is a very important part of 2D DCT/IDCT processor. This paper also presents a low power and constant coefficient multiplier with CSD coding and Wallace Tree addition algorithm.
英
美
- 常系數乘法器是該處理器的一個(gè)重要部件,文中基于并行乘法器結構設計了一種新型的低功耗常系數乘法器,它采用了CSD編碼、Wallace Tree乘法算法,結合采用了截斷處理、變數校正的優(yōu)化技術(shù),使得2D DCT/IDCT處理器整體性能有較大提高。
