Another synchronization mechanism for uniprocessor systems consists of disabling all hardware interrupts before entering a critical region and reenabling them right after leaving it.
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美
- 另外一個(gè)針對單處理器系統的同步機制是，在進(jìn)入一個(gè)criticalregion之前禁止全部的硬件中斷，并且在離開(kāi)這個(gè)criticalregion之后重新打開(kāi)（允許）硬件中斷。
