An interface chip used as the RS485 bus controller based on HDLC protocol was introduced, which was written in VHDL at the RTL level and implemented by a single FPGA chip.

 
  • 介紹了以HDLC協(xié)議控制為基礎的RS-485總線(xiàn)通信控制器;采用VHDL語(yǔ)言在RTL級設計;并在單片FPGA上實(shí)現.
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