An arithmetic device with low power consumption includes master latches, a dynamic range detection unit, slave latches, an operation unit, and a word-length restoration unit.

 
  • 一種低功率消耗的算術(shù)裝置,其利用輸入主級閂、動(dòng)態(tài)?圍偵測單元、控制轉換仆級閂、運算單元、位元數還原單元以構成。
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