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- 并行FFT算法parallel FFT algorithm
- 超立方體結構上的并行FFT算法分析Parallel FFT Algorithm Analysis on Hypercube Structure
- 一種高速實(shí)時(shí)定點(diǎn)FFT處理器的設計The Design of a High Speed Real-time and Fixed-point FFT Processor
- 基于無(wú)沖突地址生成的高性能FFT處理器設計Design of High Performance FFT Processor with Conflict Free Memory Access
- 并行FFTparallel FFT
- 一種基于多線(xiàn)程技術(shù)的并行FFT算法Parallel FFT algorithm based on multi-threading technology
- 并行FFT的通信模式在一組規則WDM光互連網(wǎng)絡(luò )上的波長(cháng)分配Wavelength Assignment of Parallel FFT Communication Patterns on a Class of Regular WDM Optical Networks
- 本文討論了采用FPGA和ASIC硬件實(shí)現高速實(shí)時(shí)FFT處理器的設計方案,作者在這種高速FFT設計時(shí)選擇的特點(diǎn)基于Radix 4 DIT算法、采用乒乓RAM的設計思路以及級與級間采用流水結構。The design method of a high speed real-time FFT processor using FPGA and ASIC technology is presented. It is based on the R4 DIT algorithm, Ping-pong RAM design and pipeline structure between stages.
- 提出了一種高速定點(diǎn)FFT處理器的設計方法,此方法在CORDIC算法的基礎上,通過(guò)優(yōu)化操作數地址映射方法和旋轉因子生成方法,每周期完成一個(gè)基4蝶形運算,具有最大的并行性。The paper presents the design method of a high speed and fixed-point FFT processor. By optimizing the memory mapping algorithm and the generation of twiddle factors, the method based on CORDIC algorithm can calculate a radix-4 butterfly in one clock cycle and has the maximal degree of parallelism.
- FFT分析FFT analysis
- FFT校頻FFT frequency adjustment
- FFT-ACFFFT-ACF
- 實(shí)時(shí)FFTreal-time FFT
- 辦公室的微機與總部的中央處理器相互聯(lián)結。The office micro interface with the mainframe in the head office.
- 分段FFT法測頻FFT subsection frequency estimator
- 與處理器結構相關(guān)庫代碼被放在arch/*/lib/目錄下。The architecture specific library code can be found in arch/*/lib/.
- 并行表示parallel representation
- 弱化BCGS-FFT算法weak-form BCGS-FVI" algorithm
- 并行感染parallel infection
